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author | Rekai Gonzalez-Alberquilla <rekai.gonzalezalberquilla@arm.com> | 2017-02-10 17:27:33 +0000 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-02-13 16:47:44 +0000 |
commit | 2d6afc6e2621fe67df09d4824ccd678a503b3517 (patch) | |
tree | c714bc1bc2af3b25b266849c515855b36f1e334e /src/arch/arm/faults.hh | |
parent | e9f736738d61775cd3b739dbc9f85cbf4f4c135f (diff) | |
download | gem5-2d6afc6e2621fe67df09d4824ccd678a503b3517.tar.xz |
sim: Make Stats truly non-copy-constructible
The stats are silently non-copy constructible. Therefore, when someone
copy-constructs any object with stats, asserts happen when registering
the stats, as they were not constructed in the intended way.
This patch solves that by explicitly deleting the copy constructor,
trading an obscure run-time assert for a compile-time somehow more
meaningful error meassage.
This triggers some compilation errors as the FaultStats in the fault
definitions of ARM and SPARC use brace-enclosed initialisations in which
one of the elements derives from DataWrap, which is not
copy-constructible anymore. To fix that, this patch also adds a
constructor for the FaultVals in both ISAs.
Change-Id: I340e203b9386609b32c66e3b8918a015afe415a4
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/8082
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/faults.hh')
-rw-r--r-- | src/arch/arm/faults.hh | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh index 6ae4c067e..d99116fb9 100644 --- a/src/arch/arm/faults.hh +++ b/src/arch/arm/faults.hh @@ -171,6 +171,22 @@ class ArmFault : public FaultBase const ExceptionClass ec; FaultStat count; + FaultVals(const FaultName& name_, const FaultOffset& offset_, + const uint16_t& currELTOffset_, const uint16_t& currELHOffset_, + const uint16_t& lowerEL64Offset_, + const uint16_t& lowerEL32Offset_, + const OperatingMode& nextMode_, const uint8_t& armPcOffset_, + const uint8_t& thumbPcOffset_, const uint8_t& armPcElrOffset_, + const uint8_t& thumbPcElrOffset_, const bool& hypTrappable_, + const bool& abortDisable_, const bool& fiqDisable_, + const ExceptionClass& ec_) + : name(name_), offset(offset_), currELTOffset(currELTOffset_), + currELHOffset(currELHOffset_), lowerEL64Offset(lowerEL64Offset_), + lowerEL32Offset(lowerEL32Offset_), nextMode(nextMode_), + armPcOffset(armPcOffset_), thumbPcOffset(thumbPcOffset_), + armPcElrOffset(armPcElrOffset_), thumbPcElrOffset(thumbPcElrOffset_), + hypTrappable(hypTrappable_), abortDisable(abortDisable_), + fiqDisable(fiqDisable_), ec(ec_) {} }; ArmFault(ExtMachInst _machInst = 0, uint32_t _iss = 0) : |