diff options
| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-03 07:42:52 -0400 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2014-09-03 07:42:52 -0400 |
| commit | 8f95144e161ef7bdb264eb572108a98f215785c0 (patch) | |
| tree | fed971653335ef0ee3db72d372ae3b465e10b5cd /src/arch/arm/insts/macromem.hh | |
| parent | f6f63ec0aa68f631691d9eccc18739722a0a9f17 (diff) | |
| download | gem5-8f95144e161ef7bdb264eb572108a98f215785c0.tar.xz | |
arm: Make memory ops work on 64bit/128-bit quantities
Multiple instructions assume only 32-bit load operations are available,
this patch increases load sizes to 64-bit or 128-bit for many load pair and
load multiple instructions.
Diffstat (limited to 'src/arch/arm/insts/macromem.hh')
| -rw-r--r-- | src/arch/arm/insts/macromem.hh | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/src/arch/arm/insts/macromem.hh b/src/arch/arm/insts/macromem.hh index fc8e3e1b7..412337d06 100644 --- a/src/arch/arm/insts/macromem.hh +++ b/src/arch/arm/insts/macromem.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2013 ARM Limited + * Copyright (c) 2010-2014 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -395,6 +395,26 @@ class MicroMemOp : public MicroIntImmOp std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; +class MicroMemPairOp : public MicroOp +{ + protected: + RegIndex dest, dest2, urb; + bool up; + int32_t imm; + unsigned memAccessFlags; + + MicroMemPairOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, + RegIndex _dreg1, RegIndex _dreg2, RegIndex _base, + bool _up, uint8_t _imm) + : MicroOp(mnem, machInst, __opClass), + dest(_dreg1), dest2(_dreg2), urb(_base), up(_up), imm(_imm), + memAccessFlags(TLB::MustBeOne | TLB::AlignWord) + { + } + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; +}; + /** * Base class for microcoded integer memory instructions. */ |