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authorGabe Black <gblack@eecs.umich.edu>2009-06-21 17:21:25 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-06-21 17:21:25 -0700
commitd4a03f19009b9a537d99d54620784d441f9c3a92 (patch)
tree865d044e0a86840ce9e9837f0eaac6e9da1a1bed /src/arch/arm/insts/mem.cc
parent2a39570b78dd5871582089e7e1b21b739d2e9d68 (diff)
downloadgem5-d4a03f19009b9a537d99d54620784d441f9c3a92.tar.xz
ARM: Simplify the ISA desc by pulling some classes out of it.
Diffstat (limited to 'src/arch/arm/insts/mem.cc')
-rw-r--r--src/arch/arm/insts/mem.cc46
1 files changed, 46 insertions, 0 deletions
diff --git a/src/arch/arm/insts/mem.cc b/src/arch/arm/insts/mem.cc
new file mode 100644
index 000000000..e5e91a9ea
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+++ b/src/arch/arm/insts/mem.cc
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+/* Copyright (c) 2007-2008 The Florida State University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Stephen Hines
+ */
+
+#include "arch/arm/insts/mem.hh"
+#include "base/loader/symtab.hh"
+
+namespace ArmISA
+{
+std::string
+Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+ return csprintf("%-10s", mnemonic);
+}
+
+std::string
+MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+ return csprintf("%-10s", mnemonic);
+}
+}