diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:05 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:05 -0500 |
| commit | e157b1f52ab17a24de885ee211e36c6374170a4c (patch) | |
| tree | 570512ea9ca2a3f5310f1113c35c19d1131e1bab /src/arch/arm/insts/mem.hh | |
| parent | 1884ed65bd7791315d111835888d4a83d78e204a (diff) | |
| download | gem5-e157b1f52ab17a24de885ee211e36c6374170a4c.tar.xz | |
ARM: Implement the swp and swpb instructions.
Diffstat (limited to 'src/arch/arm/insts/mem.hh')
| -rw-r--r-- | src/arch/arm/insts/mem.hh | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/arch/arm/insts/mem.hh b/src/arch/arm/insts/mem.hh index e58005883..6ed99ba5b 100644 --- a/src/arch/arm/insts/mem.hh +++ b/src/arch/arm/insts/mem.hh @@ -47,6 +47,22 @@ namespace ArmISA { +class Swap : public PredOp +{ + protected: + IntRegIndex dest; + IntRegIndex op1; + IntRegIndex base; + + Swap(const char *mnem, ExtMachInst _machInst, OpClass __opClass, + IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _base) + : PredOp(mnem, _machInst, __opClass), + dest(_dest), op1(_op1), base(_base) + {} + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; +}; + class Memory : public PredOp { public: |