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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
| commit | fb2329791464a3ea9d8c13a6aa17bf9e379dbdb9 (patch) | |
| tree | b56d402a901c20554f545d4a4a6186390dd77c28 /src/arch/arm/insts/misc.cc | |
| parent | 247acd93c49be2d9a677775e8684f6971b6c5364 (diff) | |
| download | gem5-fb2329791464a3ea9d8c13a6aa17bf9e379dbdb9.tar.xz | |
ARM: Make a base class for instructions that use only an immediate.
Diffstat (limited to 'src/arch/arm/insts/misc.cc')
| -rw-r--r-- | src/arch/arm/insts/misc.cc | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index a63bad690..87d3d1796 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -144,6 +144,15 @@ MsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const } std::string +ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +{ + std::stringstream ss; + printMnemonic(ss); + ccprintf(ss, "#%d", imm); + return ss.str(); +} + +std::string RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; |