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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:12 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:12 -0500 |
| commit | 1f059541d6160931b3bb80bef842c45c2521d642 (patch) | |
| tree | 4e4672300be214e5bba318d77cb917e32f69d672 /src/arch/arm/insts/misc.cc | |
| parent | 6976b4890a307a2d8584b4e512e3f6d728e59ad5 (diff) | |
| download | gem5-1f059541d6160931b3bb80bef842c45c2521d642.tar.xz | |
ARM: Add a new RegImmOp base class.
Diffstat (limited to 'src/arch/arm/insts/misc.cc')
| -rw-r--r-- | src/arch/arm/insts/misc.cc | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index a5a4e3b32..0eae37de0 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -153,6 +153,16 @@ ImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const } std::string +RegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +{ + std::stringstream ss; + printMnemonic(ss); + printReg(ss, dest); + ccprintf(ss, ", #%d", imm); + return ss.str(); +} + +std::string RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; |