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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:02 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:02 -0500 |
| commit | 36ca0658a412671ee18cde40b8d264e319fb4710 (patch) | |
| tree | 1f5d0c6c4d5dbb7773357b33e86ebc8e64ff1883 /src/arch/arm/insts/pred_inst.cc | |
| parent | 7939b4826506bde98d299e1ba7a38e17cd1fa785 (diff) | |
| download | gem5-36ca0658a412671ee18cde40b8d264e319fb4710.tar.xz | |
ARM: Get rid of obsoleted predicated inst formats, etc.
Diffstat (limited to 'src/arch/arm/insts/pred_inst.cc')
| -rw-r--r-- | src/arch/arm/insts/pred_inst.cc | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/arch/arm/insts/pred_inst.cc b/src/arch/arm/insts/pred_inst.cc index 94386e400..049c42f01 100644 --- a/src/arch/arm/insts/pred_inst.cc +++ b/src/arch/arm/insts/pred_inst.cc @@ -62,12 +62,9 @@ PredIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const } std::string -PredImmOpBase::generateDisassembly(Addr pc, const SymbolTable *symtab) const +PredImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; - unsigned rotate = machInst.rotate * 2; - uint32_t imm = machInst.imm; - imm = (imm << (32 - rotate)) | (imm >> rotate); printDataInst(ss, true, machInst.opcode4 == 0, machInst.sField, (IntRegIndex)(uint32_t)machInst.rd, (IntRegIndex)(uint32_t)machInst.rn, |