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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-08-25 19:10:42 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-08-25 19:10:42 -0500 |
| commit | 6368edb281f162e4fbb0a91744992a25134135f4 (patch) | |
| tree | e84dfa7d10903e6c7a56e01cc6ca23f4b0d41908 /src/arch/arm/insts/pred_inst.hh | |
| parent | f4f6b31df1a8787a12d71108eac24543bdf541e3 (diff) | |
| download | gem5-6368edb281f162e4fbb0a91744992a25134135f4.tar.xz | |
ARM: Implement all ARM SIMD instructions.
Diffstat (limited to 'src/arch/arm/insts/pred_inst.hh')
| -rw-r--r-- | src/arch/arm/insts/pred_inst.hh | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh index 2cb383ad3..b7d4c4709 100644 --- a/src/arch/arm/insts/pred_inst.hh +++ b/src/arch/arm/insts/pred_inst.hh @@ -118,24 +118,26 @@ simd_modified_imm(bool op, uint8_t cmode, uint8_t data) break; case 0xe: if (op) { - bigData = (bigData << 0) | (bigData << 8) | - (bigData << 16) | (bigData << 24) | - (bigData << 32) | (bigData << 40) | - (bigData << 48) | (bigData << 56); - } else { bigData = 0; for (int i = 7; i >= 0; i--) { if (bits(data, i)) { - bigData |= (0xFF << (i * 8)); + bigData |= (ULL(0xFF) << (i * 8)); } } + } else { + bigData = (bigData << 0) | (bigData << 8) | + (bigData << 16) | (bigData << 24) | + (bigData << 32) | (bigData << 40) | + (bigData << 48) | (bigData << 56); } + break; case 0xf: if (!op) { uint64_t bVal = bits(bigData, 6) ? (0x1F) : (0x20); bigData = (bits(bigData, 5, 0) << 19) | (bVal << 25) | (bits(bigData, 7) << 31); bigData |= (bigData << 32); + break; } // Fall through default: |