arch-arm: Removing FlushPipe fault, using SquashAfter

This Patch is removing the FlushPipe ArmFault, which was used for
flushing the pipeline in favour of the general IsSquashAfter StaticInstr
flag. Using a fault was preventing tracers from tracing barriers like
ISB and from adding them to the instruction count

Change-Id: I176e9254eca904694f2f611eb486c55e50ec61ff
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5361
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

1 files changed, 6 insertions, 6 deletions

diff --git a/src/arch/arm/insts/pseudo.cc b/src/arch/arm/insts/pseudo.cc
index ab38e29ea..aa3d93d6e 100644
--- a/src/arch/arm/insts/pseudo.cc
+++ b/src/arch/arm/insts/pseudo.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014,2016 ARM Limited
+ * Copyright (c) 2014,2016-2017 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -190,6 +190,9 @@ McrMrcMiscInst::McrMrcMiscInst(const char *_mnemonic, ExtMachInst _machInst,
     flags[IsNonSpeculative] = true;
     iss = _iss;
     miscReg = _miscReg;
+
+    if (miscReg == MISCREG_DCCMVAC)
+        flags[IsSquashAfter] = true;
 }
 
 Fault
@@ -207,12 +210,9 @@ McrMrcMiscInst::execute(ExecContext *xc, Trace::InstRecord *traceData) const
     if (hypTrap) {
         return std::make_shared<HypervisorTrap>(machInst, iss,
                                                 EC_TRAPPED_CP15_MCR_MRC);
-    }
-
-    if (miscReg == MISCREG_DCCMVAC)
-        return std::make_shared<FlushPipe>();
-    else
+    } else {
         return NoFault;
+    }
 }
 
 std::string