ARM: Tune up predicated instruction decoding.

1 files changed, 43 insertions, 46 deletions

diff --git a/src/arch/arm/insts/static_inst.cc b/src/arch/arm/insts/static_inst.cc
index f3ad1127b..df2d5de25 100644
--- a/src/arch/arm/insts/static_inst.cc
+++ b/src/arch/arm/insts/static_inst.cc
@@ -330,61 +330,52 @@ ArmStaticInst::printMemSymbol(std::ostream &os,
 void
 ArmStaticInst::printShiftOperand(std::ostream &os) const
 {
-    // Shifter operand
-    if (bits((uint32_t)machInst, 25)) {
-        // Immediate form
-        unsigned rotate = machInst.rotate * 2;
-        uint32_t imm = machInst.imm;
-        ccprintf(os, "#%#x", (imm << (32 - rotate)) | (imm >> rotate));
-    } else {
-        // Register form
-        printReg(os, machInst.rm);
+    printReg(os, machInst.rm);
 
-        bool immShift = (machInst.opcode4 == 0);
-        bool done = false;
-        unsigned shiftAmt = (machInst.shiftSize);
-        ArmShiftType type = (ArmShiftType)(uint32_t)machInst.shift;
+    bool immShift = (machInst.opcode4 == 0);
+    bool done = false;
+    unsigned shiftAmt = (machInst.shiftSize);
+    ArmShiftType type = (ArmShiftType)(uint32_t)machInst.shift;
 
-        if ((type == LSR || type == ASR) && immShift && shiftAmt == 0)
-            shiftAmt = 32;
+    if ((type == LSR || type == ASR) && immShift && shiftAmt == 0)
+        shiftAmt = 32;
 
-        switch (type) {
-          case LSL:
-            if (immShift && shiftAmt == 0) {
-                done = true;
-                break;
-            }
-            os << ", LSL";
-            break;
-          case LSR:
-            os << ", LSR";
-            break;
-          case ASR:
-            os << ", ASR";
-            break;
-          case ROR:
-            if (immShift && shiftAmt == 0) {
-                os << ", RRX";
-                done = true;
-                break;
-            }
-            os << ", ROR";
+    switch (type) {
+      case LSL:
+        if (immShift && shiftAmt == 0) {
+            done = true;
             break;
-          default:
-            panic("Tried to disassemble unrecognized shift type.\n");
         }
-        if (!done) {
-            os << " ";
-            if (immShift)
-                os << "#" << shiftAmt;
-            else
-                printReg(os, machInst.rs);
+        os << ", LSL";
+        break;
+      case LSR:
+        os << ", LSR";
+        break;
+      case ASR:
+        os << ", ASR";
+        break;
+      case ROR:
+        if (immShift && shiftAmt == 0) {
+            os << ", RRX";
+            done = true;
+            break;
         }
+        os << ", ROR";
+        break;
+      default:
+        panic("Tried to disassemble unrecognized shift type.\n");
+    }
+    if (!done) {
+        os << " ";
+        if (immShift)
+            os << "#" << shiftAmt;
+        else
+            printReg(os, machInst.rs);
     }
 }
 
 void
-ArmStaticInst::printDataInst(std::ostream &os) const
+ArmStaticInst::printDataInst(std::ostream &os, bool withImm) const
 {
     printMnemonic(os, machInst.sField ? "s" : "");
     //XXX It would be nice if the decoder figured this all out for us.
@@ -409,7 +400,13 @@ ArmStaticInst::printDataInst(std::ostream &os) const
 
     if (!firstOp)
         os << ", ";
-    printShiftOperand(os);
+    if (withImm) {
+        unsigned rotate = machInst.rotate * 2;
+        uint32_t imm = machInst.imm;
+        ccprintf(os, "#%#x", (imm << (32 - rotate)) | (imm >> rotate));
+    } else {
+        printShiftOperand(os);
+    }
 }
 
 std::string