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authorGabe Black <gblack@eecs.umich.edu>2010-08-25 19:10:42 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-08-25 19:10:42 -0500
commit6368edb281f162e4fbb0a91744992a25134135f4 (patch)
treee84dfa7d10903e6c7a56e01cc6ca23f4b0d41908 /src/arch/arm/insts/static_inst.hh
parentf4f6b31df1a8787a12d71108eac24543bdf541e3 (diff)
downloadgem5-6368edb281f162e4fbb0a91744992a25134135f4.tar.xz
ARM: Implement all ARM SIMD instructions.
Diffstat (limited to 'src/arch/arm/insts/static_inst.hh')
-rw-r--r--src/arch/arm/insts/static_inst.hh22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh
index 5a1993b86..e98f85a3b 100644
--- a/src/arch/arm/insts/static_inst.hh
+++ b/src/arch/arm/insts/static_inst.hh
@@ -251,6 +251,28 @@ class ArmStaticInst : public StaticInst
}
}
+ template<class T, class E>
+ static inline T
+ cSwap(T val, bool big)
+ {
+ const unsigned count = sizeof(T) / sizeof(E);
+ union {
+ T tVal;
+ E eVals[count];
+ } conv;
+ conv.tVal = htog(val);
+ if (big) {
+ for (unsigned i = 0; i < count; i++) {
+ conv.eVals[i] = gtobe(conv.eVals[i]);
+ }
+ } else {
+ for (unsigned i = 0; i < count; i++) {
+ conv.eVals[i] = gtole(conv.eVals[i]);
+ }
+ }
+ return gtoh(conv.tVal);
+ }
+
// Perform an interworking branch.
template<class XC>
static inline void