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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-15 14:22:43 -0400 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-15 14:22:43 -0400 |
| commit | 219c423f1fb0f9a559bfa87f9812426d5e2c3e29 (patch) | |
| tree | 7980ae867c4642e710af7cd5d0ad7fe51c0b6687 /src/arch/arm/insts | |
| parent | a830e63de71e5929b8ff8e334bc872faa9193a8b (diff) | |
| download | gem5-219c423f1fb0f9a559bfa87f9812426d5e2c3e29.tar.xz | |
cpu: rename *_DepTag constants to *_Reg_Base
Make these names more meaningful.
Specifically, made these substitutions:
s/FP_Base_DepTag/FP_Reg_Base/g;
s/Ctrl_Base_DepTag/Misc_Reg_Base/g;
s/Max_DepTag/Max_Reg_Index/g;
Diffstat (limited to 'src/arch/arm/insts')
| -rw-r--r-- | src/arch/arm/insts/misc.cc | 4 | ||||
| -rw-r--r-- | src/arch/arm/insts/vfp.cc | 22 |
2 files changed, 13 insertions, 13 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index c40b6711f..6320bb6da 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -80,10 +80,10 @@ MsrBase::printMsrBase(std::ostream &os) const bool foundPsr = false; for (unsigned i = 0; i < numDestRegs(); i++) { int idx = destRegIdx(i); - if (idx < Ctrl_Base_DepTag) { + if (idx < Misc_Reg_Base) { continue; } - idx -= Ctrl_Base_DepTag; + idx -= Misc_Reg_Base; if (idx == MISCREG_CPSR) { os << "cpsr_"; foundPsr = true; diff --git a/src/arch/arm/insts/vfp.cc b/src/arch/arm/insts/vfp.cc index 015247d68..ca0f58226 100644 --- a/src/arch/arm/insts/vfp.cc +++ b/src/arch/arm/insts/vfp.cc @@ -50,9 +50,9 @@ FpRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss); - printReg(ss, dest + FP_Base_DepTag); + printReg(ss, dest + FP_Reg_Base); ss << ", "; - printReg(ss, op1 + FP_Base_DepTag); + printReg(ss, op1 + FP_Reg_Base); return ss.str(); } @@ -61,7 +61,7 @@ FpRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss); - printReg(ss, dest + FP_Base_DepTag); + printReg(ss, dest + FP_Reg_Base); ccprintf(ss, ", #%d", imm); return ss.str(); } @@ -71,9 +71,9 @@ FpRegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss); - printReg(ss, dest + FP_Base_DepTag); + printReg(ss, dest + FP_Reg_Base); ss << ", "; - printReg(ss, op1 + FP_Base_DepTag); + printReg(ss, op1 + FP_Reg_Base); ccprintf(ss, ", #%d", imm); return ss.str(); } @@ -83,11 +83,11 @@ FpRegRegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss); - printReg(ss, dest + FP_Base_DepTag); + printReg(ss, dest + FP_Reg_Base); ss << ", "; - printReg(ss, op1 + FP_Base_DepTag); + printReg(ss, op1 + FP_Reg_Base); ss << ", "; - printReg(ss, op2 + FP_Base_DepTag); + printReg(ss, op2 + FP_Reg_Base); return ss.str(); } @@ -96,11 +96,11 @@ FpRegRegRegImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss); - printReg(ss, dest + FP_Base_DepTag); + printReg(ss, dest + FP_Reg_Base); ss << ", "; - printReg(ss, op1 + FP_Base_DepTag); + printReg(ss, op1 + FP_Reg_Base); ss << ", "; - printReg(ss, op2 + FP_Base_DepTag); + printReg(ss, op2 + FP_Reg_Base); ccprintf(ss, ", #%d", imm); return ss.str(); } |