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author | Ali Saidi <Ali.Saidi@ARM.com> | 2012-03-21 10:34:06 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2012-03-21 10:34:06 -0500 |
commit | ed8ed6e7614057e0c8f7461ea9f7a8f2d59a57ea (patch) | |
tree | 8060e538952556840abf34a9e0fac574eb093194 /src/arch/arm/insts | |
parent | a64319f764cfa8c961696c4fab996a50b45ab09e (diff) | |
download | gem5-ed8ed6e7614057e0c8f7461ea9f7a8f2d59a57ea.tar.xz |
ARM: Clean up condCodes in IT blocks.
Diffstat (limited to 'src/arch/arm/insts')
-rw-r--r-- | src/arch/arm/insts/branch.hh | 26 |
1 files changed, 12 insertions, 14 deletions
diff --git a/src/arch/arm/insts/branch.hh b/src/arch/arm/insts/branch.hh index 0e33a9214..cc320dbff 100644 --- a/src/arch/arm/insts/branch.hh +++ b/src/arch/arm/insts/branch.hh @@ -63,16 +63,15 @@ class BranchImm : public PredOp // Conditionally Branch to a target computed with an immediate class BranchImmCond : public BranchImm { - protected: - // This will mask the condition code stored for PredOp. Ideally these two - // class would cooperate, but they're not set up to do that at the moment. - ConditionCode condCode; - public: BranchImmCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass, int32_t _imm, ConditionCode _condCode) : - BranchImm(mnem, _machInst, __opClass, _imm), condCode(_condCode) - {} + BranchImm(mnem, _machInst, __opClass, _imm) + { + // Only update if this isn't part of an IT block + if (!machInst.itstateMask) + condCode = _condCode; + } }; // Branch to a target computed with a register @@ -91,16 +90,15 @@ class BranchReg : public PredOp // Conditionally Branch to a target computed with a register class BranchRegCond : public BranchReg { - protected: - // This will mask the condition code stored for PredOp. Ideally these two - // class would cooperate, but they're not set up to do that at the moment. - ConditionCode condCode; - public: BranchRegCond(const char *mnem, ExtMachInst _machInst, OpClass __opClass, IntRegIndex _op1, ConditionCode _condCode) : - BranchReg(mnem, _machInst, __opClass, _op1), condCode(_condCode) - {} + BranchReg(mnem, _machInst, __opClass, _op1) + { + // Only update if this isn't part of an IT block + if (!machInst.itstateMask) + condCode = _condCode; + } }; // Branch to a target computed with two registers |