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authorSteve Reinhardt <steve.reinhardt@amd.com>2016-02-06 17:21:19 -0800
committerSteve Reinhardt <steve.reinhardt@amd.com>2016-02-06 17:21:19 -0800
commit5592798865ece858bab2b444bc782d19121e2566 (patch)
tree80803048c903c424ed9f1200b5dc1a29ed3ff6b8 /src/arch/arm/insts
parentdc8018a5c3482008232e6faaa2d96cf20aed7485 (diff)
downloadgem5-5592798865ece858bab2b444bc782d19121e2566.tar.xz
style: fix missing spaces in control statements
Result of running 'hg m5style --skip-all --fix-control -a'.
Diffstat (limited to 'src/arch/arm/insts')
-rw-r--r--src/arch/arm/insts/macromem.cc14
-rw-r--r--src/arch/arm/insts/vfp.hh10
2 files changed, 12 insertions, 12 deletions
diff --git a/src/arch/arm/insts/macromem.cc b/src/arch/arm/insts/macromem.cc
index 5578354d9..154039a77 100644
--- a/src/arch/arm/insts/macromem.cc
+++ b/src/arch/arm/insts/macromem.cc
@@ -145,7 +145,7 @@ MacroMemOp::MacroMemOp(const char *mnem, ExtMachInst machInst,
// 32-bit memory operation
// Find register for operation
unsigned reg_idx;
- while(!bits(regs, reg)) reg++;
+ while (!bits(regs, reg)) reg++;
replaceBits(regs, reg, 0);
reg_idx = force_user ? intRegInMode(MODE_USER, reg) : reg;
@@ -1149,7 +1149,7 @@ VldMultOp64::VldMultOp64(const char *mnem, ExtMachInst machInst,
TLB::AllowUnaligned;
int i = 0;
- for(; i < numMemMicroops - 1; ++i) {
+ for (; i < numMemMicroops - 1; ++i) {
microOps[uopIdx++] = new MicroNeonLoad64(
machInst, vx + (RegIndex) i, rnsp, 16 * i, memaccessFlags,
baseIsSP, 16 /* accSize */, eSize);
@@ -1231,7 +1231,7 @@ VstMultOp64::VstMultOp64(const char *mnem, ExtMachInst machInst,
microOps = new StaticInstPtr[numMicroops];
unsigned uopIdx = 0;
- for(int i = 0; i < numMarshalMicroops; ++i) {
+ for (int i = 0; i < numMarshalMicroops; ++i) {
switch (numRegs) {
case 1: microOps[uopIdx++] = new MicroIntNeon64_1Reg(
machInst, vx + (RegIndex) (2 * i), vd, eSize, dataSize,
@@ -1257,7 +1257,7 @@ VstMultOp64::VstMultOp64(const char *mnem, ExtMachInst machInst,
TLB::AllowUnaligned;
int i = 0;
- for(; i < numMemMicroops - 1; ++i) {
+ for (; i < numMemMicroops - 1; ++i) {
microOps[uopIdx++] = new MicroNeonStore64(
machInst, vx + (RegIndex) i, rnsp, 16 * i, memaccessFlags,
baseIsSP, 16 /* accSize */, eSize);
@@ -1347,7 +1347,7 @@ VldSingleOp64::VldSingleOp64(const char *mnem, ExtMachInst machInst,
}
}
- for(int i = 0; i < numMarshalMicroops; ++i) {
+ for (int i = 0; i < numMarshalMicroops; ++i) {
microOps[uopIdx++] = new MicroUnpackNeon64(
machInst, vd + (RegIndex) (2 * i), vx, eSize, dataSize,
numStructElems, index, i /* step */, replicate);
@@ -1394,7 +1394,7 @@ VstSingleOp64::VstSingleOp64(const char *mnem, ExtMachInst machInst,
microOps = new StaticInstPtr[numMicroops];
unsigned uopIdx = 0;
- for(int i = 0; i < numMarshalMicroops; ++i) {
+ for (int i = 0; i < numMarshalMicroops; ++i) {
microOps[uopIdx++] = new MicroPackNeon64(
machInst, vx + (RegIndex) (2 * i), vd, eSize, dataSize,
numStructElems, index, i /* step */, replicate);
@@ -1404,7 +1404,7 @@ VstSingleOp64::VstSingleOp64(const char *mnem, ExtMachInst machInst,
TLB::AllowUnaligned;
int i = 0;
- for(; i < numMemMicroops - 1; ++i) {
+ for (; i < numMemMicroops - 1; ++i) {
microOps[uopIdx++] = new MicroNeonStore64(
machInst, vx + (RegIndex) i, rnsp, 16 * i, memaccessFlags,
baseIsSP, 16 /* accsize */, eSize);
diff --git a/src/arch/arm/insts/vfp.hh b/src/arch/arm/insts/vfp.hh
index f17f90973..f28ab9e1f 100644
--- a/src/arch/arm/insts/vfp.hh
+++ b/src/arch/arm/insts/vfp.hh
@@ -551,7 +551,7 @@ fpMulX(T a, T b)
bool zero1 = (std::fpclassify(a) == FP_ZERO);
bool zero2 = (std::fpclassify(b) == FP_ZERO);
if ((inf1 && zero2) || (zero1 && inf2)) {
- if(sign1 ^ sign2)
+ if (sign1 ^ sign2)
return (T)(-2.0);
else
return (T)(2.0);
@@ -685,7 +685,7 @@ fpRSqrts(T a, T b)
}
aXb = a*b;
fpClassAxB = std::fpclassify(aXb);
- if(fpClassAxB == FP_SUBNORMAL) {
+ if (fpClassAxB == FP_SUBNORMAL) {
feraiseexcept(FeUnderflow);
return 1.5;
}
@@ -707,7 +707,7 @@ fpRecps(T a, T b)
}
aXb = a*b;
fpClassAxB = std::fpclassify(aXb);
- if(fpClassAxB == FP_SUBNORMAL) {
+ if (fpClassAxB == FP_SUBNORMAL) {
feraiseexcept(FeUnderflow);
return 2.0;
}
@@ -729,7 +729,7 @@ fpRSqrtsS(float a, float b)
}
aXb = a*b;
fpClassAxB = std::fpclassify(aXb);
- if(fpClassAxB == FP_SUBNORMAL) {
+ if (fpClassAxB == FP_SUBNORMAL) {
feraiseexcept(FeUnderflow);
return 1.5;
}
@@ -750,7 +750,7 @@ fpRecpsS(float a, float b)
}
aXb = a*b;
fpClassAxB = std::fpclassify(aXb);
- if(fpClassAxB == FP_SUBNORMAL) {
+ if (fpClassAxB == FP_SUBNORMAL) {
feraiseexcept(FeUnderflow);
return 2.0;
}