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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:17 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:17 -0500 |
| commit | 358fdc2a40e8a455f508532b47e55f3252053805 (patch) | |
| tree | 4641a564de6d0ce42a372be77e35cde55e2c177c /src/arch/arm/insts | |
| parent | 596cbe19d4591b900acc022ff5a38fc7ee9a5df7 (diff) | |
| download | gem5-358fdc2a40e8a455f508532b47e55f3252053805.tar.xz | |
ARM: Decode to specialized conditional/unconditional versions of instructions.
This is to avoid condition code based dependences from effectively serializing
instructions when the instruction doesn't actually use them.
Diffstat (limited to 'src/arch/arm/insts')
| -rw-r--r-- | src/arch/arm/insts/pred_inst.hh | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh index b5095dcef..2cb383ad3 100644 --- a/src/arch/arm/insts/pred_inst.hh +++ b/src/arch/arm/insts/pred_inst.hh @@ -176,7 +176,9 @@ class PredOp : public ArmStaticInst /// Constructor PredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : ArmStaticInst(mnem, _machInst, __opClass), - condCode((ConditionCode)(unsigned)machInst.condCode) + condCode(machInst.itstateMask ? + (ConditionCode)(uint8_t)machInst.itstateCond : + (ConditionCode)(unsigned)machInst.condCode) { } }; |