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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:08 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:08 -0500 |
| commit | 6c1b10043fd7c79e1beaae8dd52b93c12fdec42c (patch) | |
| tree | dacb2d78a3543738db295ea428ee46b809538373 /src/arch/arm/insts | |
| parent | f9d1bba22a9e73ab45c0e255ca70eb509915181a (diff) | |
| download | gem5-6c1b10043fd7c79e1beaae8dd52b93c12fdec42c.tar.xz | |
ARM: Rename the RevOp base class to something more generic.
Diffstat (limited to 'src/arch/arm/insts')
| -rw-r--r-- | src/arch/arm/insts/misc.cc | 2 | ||||
| -rw-r--r-- | src/arch/arm/insts/misc.hh | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index 20f102e72..a63bad690 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -144,7 +144,7 @@ MsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const } std::string -RevOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss); diff --git a/src/arch/arm/insts/misc.hh b/src/arch/arm/insts/misc.hh index b5a75d20d..23f777c2d 100644 --- a/src/arch/arm/insts/misc.hh +++ b/src/arch/arm/insts/misc.hh @@ -94,14 +94,14 @@ class MsrRegOp : public MsrBase std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; -class RevOp : public PredOp +class RegRegOp : public PredOp { protected: IntRegIndex dest; IntRegIndex op1; - RevOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, - IntRegIndex _dest, IntRegIndex _op1) : + RegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, + IntRegIndex _dest, IntRegIndex _op1) : PredOp(mnem, _machInst, __opClass), dest(_dest), op1(_op1) {} |