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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:07 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:07 -0500 |
| commit | cb2e3b0acedbad6b35c0b2a56141399cf4d1c522 (patch) | |
| tree | df2196eb78a542fd2c01a42ef37313d22ee20cdf /src/arch/arm/insts | |
| parent | a1208aa66d04994d3b1d8b2dc703dbb95fe0c98c (diff) | |
| download | gem5-cb2e3b0acedbad6b35c0b2a56141399cf4d1c522.tar.xz | |
ARM: Generalize the saturation instruction bases for use in other instructions.
Diffstat (limited to 'src/arch/arm/insts')
| -rw-r--r-- | src/arch/arm/insts/misc.cc | 8 | ||||
| -rw-r--r-- | src/arch/arm/insts/misc.hh | 22 |
2 files changed, 15 insertions, 15 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index 0d68b7c2b..f8106c33a 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -155,23 +155,23 @@ RevOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const } std::string -SatOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +RegImmRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss); printReg(ss, dest); - ccprintf(ss, ", #%d, ", satImm); + ccprintf(ss, ", #%d, ", imm); printReg(ss, op1); return ss.str(); } std::string -SatShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +RegImmRegShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss); printReg(ss, dest); - ccprintf(ss, ", #%d, ", satImm); + ccprintf(ss, ", #%d, ", imm); printShiftOperand(ss, op1, true, shiftAmt, INTREG_ZERO, shiftType); printReg(ss, op1); return ss.str(); diff --git a/src/arch/arm/insts/misc.hh b/src/arch/arm/insts/misc.hh index f4520478e..fed2e2479 100644 --- a/src/arch/arm/insts/misc.hh +++ b/src/arch/arm/insts/misc.hh @@ -108,36 +108,36 @@ class RevOp : public PredOp std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; -class SatOp : public PredOp +class RegImmRegOp : public PredOp { protected: IntRegIndex dest; - uint32_t satImm; + uint32_t imm; IntRegIndex op1; - SatOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, - IntRegIndex _dest, uint32_t _satImm, IntRegIndex _op1) : + RegImmRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, + IntRegIndex _dest, uint32_t _imm, IntRegIndex _op1) : PredOp(mnem, _machInst, __opClass), - dest(_dest), satImm(_satImm), op1(_op1) + dest(_dest), imm(_imm), op1(_op1) {} std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; -class SatShiftOp : public PredOp +class RegImmRegShiftOp : public PredOp { protected: IntRegIndex dest; - uint32_t satImm; + uint32_t imm; IntRegIndex op1; int32_t shiftAmt; ArmShiftType shiftType; - SatShiftOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, - IntRegIndex _dest, uint32_t _satImm, IntRegIndex _op1, - int32_t _shiftAmt, ArmShiftType _shiftType) : + RegImmRegShiftOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, + IntRegIndex _dest, uint32_t _imm, IntRegIndex _op1, + int32_t _shiftAmt, ArmShiftType _shiftType) : PredOp(mnem, _machInst, __opClass), - dest(_dest), satImm(_satImm), op1(_op1), + dest(_dest), imm(_imm), op1(_op1), shiftAmt(_shiftAmt), shiftType(_shiftType) {} |