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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:16 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:16 -0500 |
commit | 04e196f4223b5dfd61782edaaac27166a2bfcf3c (patch) | |
tree | fcb49e96f8c87c4713d508a31f746221d9ebb24b /src/arch/arm/insts | |
parent | 0fe0390f73eaf49dc682846cc7cd2382dd49eebb (diff) | |
download | gem5-04e196f4223b5dfd61782edaaac27166a2bfcf3c.tar.xz |
ARM: Clean up VFP
Diffstat (limited to 'src/arch/arm/insts')
-rw-r--r-- | src/arch/arm/insts/static_inst.hh | 5 | ||||
-rw-r--r-- | src/arch/arm/insts/vfp.hh | 84 |
2 files changed, 17 insertions, 72 deletions
diff --git a/src/arch/arm/insts/static_inst.hh b/src/arch/arm/insts/static_inst.hh index 3af9ef3b0..33453bec6 100644 --- a/src/arch/arm/insts/static_inst.hh +++ b/src/arch/arm/insts/static_inst.hh @@ -50,11 +50,6 @@ namespace ArmISA class ArmStaticInst : public StaticInst { protected: - union IntDoubleUnion { - uint64_t bits; - double fp; - }; - int32_t shift_rm_imm(uint32_t base, uint32_t shamt, uint32_t type, uint32_t cfval) const; int32_t shift_rm_rs(uint32_t base, uint32_t shamt, diff --git a/src/arch/arm/insts/vfp.hh b/src/arch/arm/insts/vfp.hh index 00b746429..259bf9c11 100644 --- a/src/arch/arm/insts/vfp.hh +++ b/src/arch/arm/insts/vfp.hh @@ -106,28 +106,6 @@ enum VfpRoundingMode }; template <class fpType> -static inline void -vfpFlushToZero(uint32_t &_fpscr, fpType &op) -{ - FPSCR fpscr = _fpscr; - fpType junk = 0.0; - if (fpscr.fz == 1 && (std::fpclassify(op) == FP_SUBNORMAL)) { - fpscr.idc = 1; - uint64_t bitMask = ULL(0x1) << (sizeof(fpType) * 8 - 1); - op = bitsToFp(fpToBits(op) & bitMask, junk); - } - _fpscr = fpscr; -} - -template <class fpType> -static inline void -vfpFlushToZero(uint32_t &fpscr, fpType &op1, fpType &op2) -{ - vfpFlushToZero(fpscr, op1); - vfpFlushToZero(fpscr, op2); -} - -template <class fpType> static inline bool flushToZero(fpType &op) { @@ -149,6 +127,23 @@ flushToZero(fpType &op1, fpType &op2) return flush1 || flush2; } +template <class fpType> +static inline void +vfpFlushToZero(FPSCR &fpscr, fpType &op) +{ + if (fpscr.fz == 1 && flushToZero(op)) { + fpscr.idc = 1; + } +} + +template <class fpType> +static inline void +vfpFlushToZero(FPSCR &fpscr, fpType &op1, fpType &op2) +{ + vfpFlushToZero(fpscr, op1); + vfpFlushToZero(fpscr, op2); +} + static inline uint32_t fpToBits(float fp) { @@ -200,28 +195,6 @@ bitsToFp(uint64_t bits, double junk) typedef int VfpSavedState; static inline VfpSavedState -prepVfpFpscr(FPSCR fpscr) -{ - int roundingMode = fegetround(); - feclearexcept(FeAllExceptions); - switch (fpscr.rMode) { - case VfpRoundNearest: - fesetround(FeRoundNearest); - break; - case VfpRoundUpward: - fesetround(FeRoundUpward); - break; - case VfpRoundDown: - fesetround(FeRoundDown); - break; - case VfpRoundZero: - fesetround(FeRoundZero); - break; - } - return roundingMode; -} - -static inline VfpSavedState prepFpState(uint32_t rMode) { int roundingMode = fegetround(); @@ -243,29 +216,6 @@ prepFpState(uint32_t rMode) return roundingMode; } -static inline FPSCR -setVfpFpscr(FPSCR fpscr, VfpSavedState state) -{ - int exceptions = fetestexcept(FeAllExceptions); - if (exceptions & FeInvalid) { - fpscr.ioc = 1; - } - if (exceptions & FeDivByZero) { - fpscr.dzc = 1; - } - if (exceptions & FeOverflow) { - fpscr.ofc = 1; - } - if (exceptions & FeUnderflow) { - fpscr.ufc = 1; - } - if (exceptions & FeInexact) { - fpscr.ixc = 1; - } - fesetround(state); - return fpscr; -} - static inline void finishVfp(FPSCR &fpscr, VfpSavedState state) { |