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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:06 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:06 -0500
commitc96f03a2507dd8445ee3abe2f81df919c4cc5e58 (patch)
tree60d6693be570b61d2dfe2413be46a5a1254c19ed /src/arch/arm/insts
parent0aff168f1a3852150dc9520c294a60e8e5f917b9 (diff)
downloadgem5-c96f03a2507dd8445ee3abe2f81df919c4cc5e58.tar.xz
ARM: Implement base classes for the saturation instructions.
Diffstat (limited to 'src/arch/arm/insts')
-rw-r--r--src/arch/arm/insts/misc.cc23
-rw-r--r--src/arch/arm/insts/misc.hh36
2 files changed, 59 insertions, 0 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc
index 3547c6712..0d68b7c2b 100644
--- a/src/arch/arm/insts/misc.cc
+++ b/src/arch/arm/insts/misc.cc
@@ -153,3 +153,26 @@ RevOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
printReg(ss, op1);
return ss.str();
}
+
+std::string
+SatOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+ std::stringstream ss;
+ printMnemonic(ss);
+ printReg(ss, dest);
+ ccprintf(ss, ", #%d, ", satImm);
+ printReg(ss, op1);
+ return ss.str();
+}
+
+std::string
+SatShiftOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+{
+ std::stringstream ss;
+ printMnemonic(ss);
+ printReg(ss, dest);
+ ccprintf(ss, ", #%d, ", satImm);
+ printShiftOperand(ss, op1, true, shiftAmt, INTREG_ZERO, shiftType);
+ printReg(ss, op1);
+ return ss.str();
+}
diff --git a/src/arch/arm/insts/misc.hh b/src/arch/arm/insts/misc.hh
index ae8d20e79..f4520478e 100644
--- a/src/arch/arm/insts/misc.hh
+++ b/src/arch/arm/insts/misc.hh
@@ -108,4 +108,40 @@ class RevOp : public PredOp
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
+class SatOp : public PredOp
+{
+ protected:
+ IntRegIndex dest;
+ uint32_t satImm;
+ IntRegIndex op1;
+
+ SatOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
+ IntRegIndex _dest, uint32_t _satImm, IntRegIndex _op1) :
+ PredOp(mnem, _machInst, __opClass),
+ dest(_dest), satImm(_satImm), op1(_op1)
+ {}
+
+ std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+};
+
+class SatShiftOp : public PredOp
+{
+ protected:
+ IntRegIndex dest;
+ uint32_t satImm;
+ IntRegIndex op1;
+ int32_t shiftAmt;
+ ArmShiftType shiftType;
+
+ SatShiftOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
+ IntRegIndex _dest, uint32_t _satImm, IntRegIndex _op1,
+ int32_t _shiftAmt, ArmShiftType _shiftType) :
+ PredOp(mnem, _machInst, __opClass),
+ dest(_dest), satImm(_satImm), op1(_op1),
+ shiftAmt(_shiftAmt), shiftType(_shiftType)
+ {}
+
+ std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+};
+
#endif