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author | Edmund Grimley Evans <Edmund.Grimley-Evans@arm.com> | 2018-06-28 14:32:01 +0100 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2018-10-02 14:10:50 +0000 |
commit | 352d666fa1e9b5ae960127c95d19cf63c8ff0df7 (patch) | |
tree | 60fe09123ff1da0192b53fd36a6623d880b5509c /src/arch/arm/insts | |
parent | 9c687a6f70a7b88b8e8c125421c5f5e765b928a5 (diff) | |
download | gem5-352d666fa1e9b5ae960127c95d19cf63c8ff0df7.tar.xz |
arch-arm: Add FP16 support introduced by Armv8.2-A
This changeset adds support for FP/SIMD instructions with
half-precision floating-point operands.
Change-Id: I4957f111c9c5e5d6a3747fe9d169d394d642fee8
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/13084
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/insts')
-rw-r--r-- | src/arch/arm/insts/pred_inst.hh | 42 |
1 files changed, 34 insertions, 8 deletions
diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh index d2a9f7080..62d1c09ab 100644 --- a/src/arch/arm/insts/pred_inst.hh +++ b/src/arch/arm/insts/pred_inst.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010, 2012-2013 ARM Limited + * Copyright (c) 2010, 2012-2013, 2017-2018 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -158,25 +158,51 @@ simd_modified_imm(bool op, uint8_t cmode, uint8_t data, bool &immValid, return bigData; } +/** Floating point data types. */ +enum class FpDataType { Fp16, Fp32, Fp64 }; + static inline uint64_t -vfp_modified_imm(uint8_t data, bool wide) +vfp_modified_imm(uint8_t data, FpDataType dtype) { uint64_t bigData = data; uint64_t repData; - if (wide) { - repData = bits(data, 6) ? 0xFF : 0; - bigData = (bits(bigData, 5, 0) << 48) | - (repData << 54) | (bits(~bigData, 6) << 62) | - (bits(bigData, 7) << 63); - } else { + switch (dtype) { + case FpDataType::Fp16: + repData = bits(data, 6) ? 0x3 : 0; + bigData = (bits(bigData, 5, 0) << 6) | + (repData << 12) | (bits(~bigData, 6) << 14) | + (bits(bigData, 7) << 15); + break; + case FpDataType::Fp32: repData = bits(data, 6) ? 0x1F : 0; bigData = (bits(bigData, 5, 0) << 19) | (repData << 25) | (bits(~bigData, 6) << 30) | (bits(bigData, 7) << 31); + break; + case FpDataType::Fp64: + repData = bits(data, 6) ? 0xFF : 0; + bigData = (bits(bigData, 5, 0) << 48) | + (repData << 54) | (bits(~bigData, 6) << 62) | + (bits(bigData, 7) << 63); + break; + default: + assert(0); } return bigData; } +static inline FpDataType +decode_fp_data_type(uint8_t encoding) +{ + switch (encoding) { + case 1: return FpDataType::Fp16; + case 2: return FpDataType::Fp32; + case 3: return FpDataType::Fp64; + default: + panic( + "Invalid floating point data type in VFP/SIMD or SVE instruction"); + } +} /** * Base class for predicated integer operations. |