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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-05-29 16:30:33 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-06-14 13:45:49 +0000 |
| commit | fe8faa62b74087febe227f69385db3e562682799 (patch) | |
| tree | 2ae38f63d387a49c048f3dc9f71f07eb70bce1ce /src/arch/arm/insts | |
| parent | 831184d2949fbd790a2040738079ca03c8cfdefe (diff) | |
| download | gem5-fe8faa62b74087febe227f69385db3e562682799.tar.xz | |
arch-arm: Add Illegal Execution flag to PCState
This patch moves the detection of the Illegal Execution flag (PSTATE.IL)
from the tlb translation stage (fetch) to the decoding stage. This is
done by adding the illegalExecution field to the PCState.
Change-Id: I9c1c4e9c6bd5ded905c1d56b3034e4e9322582fa
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10813
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/insts')
| -rw-r--r-- | src/arch/arm/insts/pseudo.cc | 10 | ||||
| -rw-r--r-- | src/arch/arm/insts/pseudo.hh | 15 |
2 files changed, 25 insertions, 0 deletions
diff --git a/src/arch/arm/insts/pseudo.cc b/src/arch/arm/insts/pseudo.cc index e2504d61e..2e8c3f10d 100644 --- a/src/arch/arm/insts/pseudo.cc +++ b/src/arch/arm/insts/pseudo.cc @@ -249,3 +249,13 @@ McrMrcImplDefined::generateDisassembly(Addr pc, { return csprintf("%-10s (implementation defined)", mnemonic); } + +IllegalExecInst::IllegalExecInst(ExtMachInst _machInst) + : ArmStaticInst("Illegal Execution", _machInst, No_OpClass) +{} + +Fault +IllegalExecInst::execute(ExecContext *xc, Trace::InstRecord *traceData) const +{ + return std::make_shared<IllegalInstSetStateFault>(); +} diff --git a/src/arch/arm/insts/pseudo.hh b/src/arch/arm/insts/pseudo.hh index ececbbb86..9065c6281 100644 --- a/src/arch/arm/insts/pseudo.hh +++ b/src/arch/arm/insts/pseudo.hh @@ -161,4 +161,19 @@ class McrMrcImplDefined : public McrMrcMiscInst }; +/** + * This class is modelling instructions which are not going to be + * executed since they are flagged as Illegal Execution Instructions + * (PSTATE.IL = 1 or CPSR.IL = 1). + * The sole purpose of this instruction is to generate an appropriate + * fault when executed. + */ +class IllegalExecInst : public ArmStaticInst +{ + public: + IllegalExecInst(ExtMachInst _machInst); + + Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const; +}; + #endif |