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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-08-16 14:20:50 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-08-20 14:23:19 +0000 |
| commit | 20990ad5e9fc98b1fd5b107e8acad2fa97a4ef75 (patch) | |
| tree | 77e921a9d7ed9402789cb7c4602836f2a5e20d16 /src/arch/arm/insts | |
| parent | e97a1fe390a91f30042d683ebc5e654d39844eda (diff) | |
| download | gem5-20990ad5e9fc98b1fd5b107e8acad2fa97a4ef75.tar.xz | |
arch-arm: Replace occ of opModeToEL(currOpMode/cpsr) with currEL
Change-Id: I739a9be03ea5caa63540c62fd110eee86a058c4c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20252
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/arm/insts')
| -rw-r--r-- | src/arch/arm/insts/static_inst.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/insts/static_inst.cc b/src/arch/arm/insts/static_inst.cc index 03a758ff9..1f849b971 100644 --- a/src/arch/arm/insts/static_inst.cc +++ b/src/arch/arm/insts/static_inst.cc @@ -703,7 +703,7 @@ ArmStaticInst::checkAdvSIMDOrFPEnabled32(ThreadContext *tc, const bool have_virtualization = ArmSystem::haveVirtualization(tc); const bool have_security = ArmSystem::haveSecurity(tc); const bool is_secure = inSecureState(tc); - const ExceptionLevel cur_el = opModeToEL(currOpMode(tc)); + const ExceptionLevel cur_el = currEL(tc); if (cur_el == EL0 && ELIs64(tc, EL1)) return checkFPAdvSIMDEnabled64(tc, cpsr, cpacr); |