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| author | Curtis Dunham <Curtis.Dunham@arm.com> | 2014-04-29 16:05:02 -0500 |
|---|---|---|
| committer | Curtis Dunham <Curtis.Dunham@arm.com> | 2014-04-29 16:05:02 -0500 |
| commit | 4a3f11149d791284a012af71067f6b2199aa165c (patch) | |
| tree | c960b2f2c5e23fc37e238f423a8bbc3b73419213 /src/arch/arm/intregs.hh | |
| parent | 035a82ee2c7e9ee72163a6559f721b242427906d (diff) | |
| download | gem5-4a3f11149d791284a012af71067f6b2199aa165c.tar.xz | |
arm: use condition code registers for ARM ISA
Analogous to ee049bf (for x86). Requires a bump of the checkpoint version
and corresponding upgrader code to move the condition code register values
to the new register file.
Diffstat (limited to 'src/arch/arm/intregs.hh')
| -rw-r--r-- | src/arch/arm/intregs.hh | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/arch/arm/intregs.hh b/src/arch/arm/intregs.hh index f96db30d3..d92f58fc4 100644 --- a/src/arch/arm/intregs.hh +++ b/src/arch/arm/intregs.hh @@ -115,11 +115,6 @@ enum IntRegIndex INTREG_UREG0, INTREG_UREG1, INTREG_UREG2, - INTREG_CONDCODES_NZ, - INTREG_CONDCODES_C, - INTREG_CONDCODES_V, - INTREG_CONDCODES_GE, - INTREG_FPCONDCODES, INTREG_DUMMY, // Dummy reg used to throw away int reg results INTREG_SP0, |