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| author | Andrew Bardsley <Andrew.Bardsley@arm.com> | 2014-09-03 07:42:43 -0400 |
|---|---|---|
| committer | Andrew Bardsley <Andrew.Bardsley@arm.com> | 2014-09-03 07:42:43 -0400 |
| commit | 035a82ee2c7e9ee72163a6559f721b242427906d (patch) | |
| tree | 40092c2686468fc08214c3753c11cba2578922e3 /src/arch/arm/intregs.hh | |
| parent | ee68c2b30232a43c5494ce183022e9fe09a004d2 (diff) | |
| download | gem5-035a82ee2c7e9ee72163a6559f721b242427906d.tar.xz | |
arm: ISA X31 destination register fix
This patch substituted the zero register for X31 used as a
destination register. This prevents false dependencies based on
X31.
Diffstat (limited to 'src/arch/arm/intregs.hh')
| -rw-r--r-- | src/arch/arm/intregs.hh | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/arch/arm/intregs.hh b/src/arch/arm/intregs.hh index fa18aa68d..f96db30d3 100644 --- a/src/arch/arm/intregs.hh +++ b/src/arch/arm/intregs.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2013 ARM Limited + * Copyright (c) 2010-2014 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -510,6 +510,13 @@ makeSP(IntRegIndex reg) return reg; } +static inline IntRegIndex +makeZero(IntRegIndex reg) +{ + if (reg == INTREG_X31) + reg = INTREG_ZERO; + return reg; +} static inline bool isSP(IntRegIndex reg) |