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author | Gabe Black <gblack@eecs.umich.edu> | 2013-01-04 18:09:35 -0600 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2013-01-04 18:09:35 -0600 |
commit | a83e74b37adc26afe4e69e59ed0092dafa63fc09 (patch) | |
tree | 5419dab639987b79738898cad8425656746d877e /src/arch/arm/isa.cc | |
parent | 1945f9963d95cdd244a4540519f3d9d1b9597767 (diff) | |
download | gem5-a83e74b37adc26afe4e69e59ed0092dafa63fc09.tar.xz |
ARM: Keep a copy of the fpscr len and stride fields in the decoder.
Avoid reading them every instruction, and also eliminate the last use of the
thread context in the decoders.
Committed by: Nilay Vaish <nilay@cs.wisc.edu>
Diffstat (limited to 'src/arch/arm/isa.cc')
-rw-r--r-- | src/arch/arm/isa.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index b253574c7..0df50a85e 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -381,6 +381,7 @@ ISA::setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc) fpscrMask.n = ones; newVal = (newVal & (uint32_t)fpscrMask) | (miscRegs[MISCREG_FPSCR] & ~(uint32_t)fpscrMask); + tc->getDecodePtr()->setContext(newVal); } break; case MISCREG_CPSR_Q: |