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authorAndreas Sandberg <andreas.sandberg@arm.com>2017-03-23 18:57:41 +0000
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2018-09-10 09:57:26 +0000
commitfbaf489e62feb5aef34a00530dbf4e39de9d67d4 (patch)
tree1a55216abd62a3f0ff84d0153961f8619db12fbd /src/arch/arm/isa.cc
parent476fd104a80095207eec0b594baa642937fbac01 (diff)
downloadgem5-fbaf489e62feb5aef34a00530dbf4e39de9d67d4.tar.xz
arm: Add support for tracking TCs in ISA devices
ISA devices typically need to keep track of the thread context they are associated with. Among other things, this is required for interrupt delivery. Add a BaseISADevice:setThreadContext() method to wire such models to the right thread context. Change-Id: Iad354d176c0c4c4e34c6ab8b5acaee0b69da0406 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12399 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Diffstat (limited to 'src/arch/arm/isa.cc')
-rw-r--r--src/arch/arm/isa.cc10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index c701cc3a7..9a4fb2805 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -329,6 +329,14 @@ ISA::clear64(const ArmISAParams *p)
encodePhysAddrRange64(physAddrRange64));
}
+void
+ISA::startup(ThreadContext *tc)
+{
+ pmu->setThreadContext(tc);
+
+}
+
+
MiscReg
ISA::readMiscRegNoEffect(int misc_reg) const
{
@@ -1946,6 +1954,8 @@ ISA::getGenericTimer(ThreadContext *tc)
}
timer.reset(new GenericTimerISA(*generic_timer, tc->contextId()));
+ timer->setThreadContext(tc);
+
return *timer.get();
}