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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:08 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:08 -0500 |
| commit | 660270746b666774d7673ead9cdda243ac2bda3f (patch) | |
| tree | 70a0b73daf83963a05eef1eb13a3af5fe8a88ed3 /src/arch/arm/isa.hh | |
| parent | 6c9ab5d8985841a2511f3b91a924472e94f0352c (diff) | |
| download | gem5-660270746b666774d7673ead9cdda243ac2bda3f.tar.xz | |
ARM: Actually write the value of sctlr in ISA.clear().
Diffstat (limited to 'src/arch/arm/isa.hh')
| -rw-r--r-- | src/arch/arm/isa.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index 080298158..67ee56537 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -104,6 +104,7 @@ namespace ArmISA sctlr.rao2 = 1; sctlr.rao3 = 1; sctlr.rao4 = 1; + miscRegs[MISCREG_SCTLR] = sctlr; //XXX We need to initialize the rest of the state. } |