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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-08-29 09:26:35 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-09-06 20:00:34 +0000 |
| commit | 982a7d4f13e8919cd50dccc29d001f1e98fc2fbb (patch) | |
| tree | 576b0c661ee594b1f77e7f272d878e12652b460c /src/arch/arm/isa.hh | |
| parent | 2d2f51f9897059cea36329aea20a585e0308ccad (diff) | |
| download | gem5-982a7d4f13e8919cd50dccc29d001f1e98fc2fbb.tar.xz | |
arch-arm: Add explicit AArch64 MiscReg banking
Change-Id: I89836d14491a51b1573f45c8012e3ad12b107d24
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20623
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/arm/isa.hh')
| -rw-r--r-- | src/arch/arm/isa.hh | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index 5e337c223..ff889fa7d 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -183,6 +183,10 @@ namespace ArmISA info[MISCREG_BANKED] = v; return *this; } + chain banked64(bool v = true) const { + info[MISCREG_BANKED64] = v; + return *this; + } chain bankedChild(bool v = true) const { info[MISCREG_BANKED_CHILD] = v; return *this; @@ -642,11 +646,25 @@ namespace ArmISA inSecureState(miscRegs[MISCREG_SCR], miscRegs[MISCREG_CPSR]); flat_idx += secureReg ? 2 : 1; + } else { + flat_idx = snsBankedIndex64((MiscRegIndex)reg, + !inSecureState(miscRegs[MISCREG_SCR], + miscRegs[MISCREG_CPSR])); } } return flat_idx; } + int + snsBankedIndex64(MiscRegIndex reg, bool ns) const + { + int reg_as_int = static_cast<int>(reg); + if (miscRegInfo[reg][MISCREG_BANKED64]) { + reg_as_int += (haveSecurity && !ns) ? 2 : 1; + } + return reg_as_int; + } + std::pair<int,int> getMiscIndices(int misc_reg) const { // Note: indexes of AArch64 registers are left unchanged |