diff options
author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-11-08 13:58:25 -0600 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-11-08 13:58:25 -0600 |
commit | a1e82259759ce7290269aeca6742098f1adbf2fd (patch) | |
tree | 2f93b2fe1d64c24cac0e5405f9f5a7b388c57592 /src/arch/arm/isa.hh | |
parent | 432fa0aad6092d6a9252f6a9c83c8b36509c1341 (diff) | |
download | gem5-a1e82259759ce7290269aeca6742098f1adbf2fd.tar.xz |
ARM: Add checkpointing support
Diffstat (limited to 'src/arch/arm/isa.hh')
-rw-r--r-- | src/arch/arm/isa.hh | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index 8318417f5..88d08e971 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -178,10 +178,18 @@ namespace ArmISA } void serialize(EventManager *em, std::ostream &os) - {} + { + DPRINTF(Checkpoint, "Serializing Arm Misc Registers\n"); + SERIALIZE_ARRAY(miscRegs, NumMiscRegs); + } void unserialize(EventManager *em, Checkpoint *cp, const std::string §ion) - {} + { + DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n"); + UNSERIALIZE_ARRAY(miscRegs, NumMiscRegs); + CPSR tmp_cpsr = miscRegs[MISCREG_CPSR]; + updateRegMap(tmp_cpsr); + } ISA() { |