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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
commit | c3381167c9a4271a9a8072354135bbb85b4141a7 (patch) | |
tree | 87513889cb2adac87c7f8304d9ddacaad5afe2fe /src/arch/arm/isa.hh | |
parent | 3aa8faf1779ee71034c7a5d3ce2982e8e88834fc (diff) | |
download | gem5-c3381167c9a4271a9a8072354135bbb85b4141a7.tar.xz |
ARM: Make the MPUIR register report that 1 unified data region is supported.
Diffstat (limited to 'src/arch/arm/isa.hh')
-rw-r--r-- | src/arch/arm/isa.hh | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index f6ad56dd4..a9c404351 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -112,6 +112,21 @@ namespace ArmISA */ miscRegs[MISCREG_CPACR] = 0x0fffffff; + /* One region, unified map. */ + miscRegs[MISCREG_MPUIR] = 0x100; + + /* + * Implemented = '5' from "M5", + * Variant = 0, + */ + miscRegs[MISCREG_MIDR] = + (0x35 << 24) | //Implementor is '5' from "M5" + (0 << 20) | //Variant + (0xf << 16) | //Architecture from CPUID scheme + (0 << 4) | //Primary part number + (0 << 0) | //Revision + 0; + //XXX We need to initialize the rest of the state. } |