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authorCurtis Dunham <Curtis.Dunham@arm.com>2017-12-06 14:42:07 -0600
committerCurtis Dunham <curtis.dunham@arm.com>2018-01-29 22:30:56 +0000
commit04251da6a92fa7b0779d58e194fb1bfa84b3514e (patch)
tree085a78ea187c2a249f3dbde420be217eb822058f /src/arch/arm/isa.hh
parent30919a7ef5b8d36069139e928f3b188122c50572 (diff)
downloadgem5-04251da6a92fa7b0779d58e194fb1bfa84b3514e.tar.xz
arch-arm: understandably initialize register mappings
The mappings for sharing a backing store between AArch32 and AArch64 system registers are made clearer using an initializer object. Change-Id: I29dcfab2797b4d36b3182342997edffde334a291 Signed-off-by: Curtis Dunham <Curtis.Dunham@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jack Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/6801 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/isa.hh')
-rw-r--r--src/arch/arm/isa.hh32
1 files changed, 22 insertions, 10 deletions
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh
index e96de7922..2241be725 100644
--- a/src/arch/arm/isa.hh
+++ b/src/arch/arm/isa.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010, 2012-2016 ARM Limited
+ * Copyright (c) 2010, 2012-2017 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -91,20 +91,32 @@ namespace ArmISA
/** Register translation entry used in lookUpMiscReg */
struct MiscRegLUTEntry {
- uint32_t lower;
- uint32_t upper;
+ uint32_t lower; // Lower half mapped to this register
+ uint32_t upper; // Upper half mapped to this register
};
- struct MiscRegInitializerEntry {
- uint32_t index;
- struct MiscRegLUTEntry entry;
+ /** Metadata table accessible via the value of the register */
+ std::vector<struct MiscRegLUTEntry> lookUpMiscReg;
+
+ class MiscRegLUTEntryInitializer {
+ struct MiscRegLUTEntry &entry;
+ typedef const MiscRegLUTEntryInitializer& chain;
+ public:
+ chain mapsTo(uint32_t l, uint32_t u = 0) const {
+ entry.lower = l;
+ entry.upper = u;
+ return *this;
+ }
+ MiscRegLUTEntryInitializer(struct MiscRegLUTEntry &e)
+ : entry(e)
+ {}
};
- /** Register table noting all translations */
- static const struct MiscRegInitializerEntry MiscRegSwitch[];
+ const MiscRegLUTEntryInitializer InitReg(uint32_t reg) {
+ return MiscRegLUTEntryInitializer(lookUpMiscReg[reg]);
+ }
- /** Translation table accessible via the value of the register */
- std::vector<struct MiscRegLUTEntry> lookUpMiscReg;
+ void initializeMiscRegMetadata();
MiscReg miscRegs[NumMiscRegs];
const IntRegIndex *intRegMap;