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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-03-23 18:57:41 +0000 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-09-10 09:57:26 +0000 |
commit | fbaf489e62feb5aef34a00530dbf4e39de9d67d4 (patch) | |
tree | 1a55216abd62a3f0ff84d0153961f8619db12fbd /src/arch/arm/isa.hh | |
parent | 476fd104a80095207eec0b594baa642937fbac01 (diff) | |
download | gem5-fbaf489e62feb5aef34a00530dbf4e39de9d67d4.tar.xz |
arm: Add support for tracking TCs in ISA devices
ISA devices typically need to keep track of the thread context they
are associated with. Among other things, this is required for
interrupt delivery. Add a BaseISADevice:setThreadContext() method to
wire such models to the right thread context.
Change-Id: Iad354d176c0c4c4e34c6ab8b5acaee0b69da0406
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/12399
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Diffstat (limited to 'src/arch/arm/isa.hh')
-rw-r--r-- | src/arch/arm/isa.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index 9158b62aa..0521c43f9 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -659,7 +659,7 @@ namespace ArmISA UNSERIALIZE_SCALAR(physAddrRange64); } - void startup(ThreadContext *tc) {} + void startup(ThreadContext *tc); Enums::DecoderFlavour decoderFlavour() const { return _decoderFlavour; } |