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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:01 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:01 -0500
commitfde3c8f41d08500e13d94227b52a642111043414 (patch)
tree7ee9529c31fc8fbf379f7546fb60d52a2f7f8ea5 /src/arch/arm/isa/bitfields.isa
parent3b93015304382f669a74ba21d65588a1d2235468 (diff)
downloadgem5-fde3c8f41d08500e13d94227b52a642111043414.tar.xz
ARM: Make 32 bit thumb use the new, external load instructions.
Diffstat (limited to 'src/arch/arm/isa/bitfields.isa')
-rw-r--r--src/arch/arm/isa/bitfields.isa2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/arm/isa/bitfields.isa b/src/arch/arm/isa/bitfields.isa
index 5d191b6df..29f3e746e 100644
--- a/src/arch/arm/isa/bitfields.isa
+++ b/src/arch/arm/isa/bitfields.isa
@@ -78,6 +78,7 @@ def bitfield COND_CODE condCode;
def bitfield S_FIELD sField;
def bitfield RN rn;
def bitfield RD rd;
+def bitfield RT rt;
def bitfield SHIFT_SIZE shiftSize;
def bitfield SHIFT shift;
def bitfield RM rm;
@@ -96,6 +97,7 @@ def bitfield PUBWL pubwl;
def bitfield IMM imm;
def bitfield IMMED_11_0 immed11_0;
+def bitfield IMMED_7_0 immed7_0;
def bitfield IMMED_HI_11_8 immedHi11_8;
def bitfield IMMED_LO_3_0 immedLo3_0;