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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-06-21 09:48:44 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-06-21 09:48:44 -0700 |
| commit | 4415e2dcd6ca508c4ffa8aa1fdcc53daee79b898 (patch) | |
| tree | 9aed3ec43297f15e678d875eb003d26940d311e6 /src/arch/arm/isa/bitfields.isa | |
| parent | 7d4ef8a398343800819930df97fcd79f7a9ba099 (diff) | |
| download | gem5-4415e2dcd6ca508c4ffa8aa1fdcc53daee79b898.tar.xz | |
ARM: Get rid of unnecessary Re operand.
Diffstat (limited to 'src/arch/arm/isa/bitfields.isa')
| -rw-r--r-- | src/arch/arm/isa/bitfields.isa | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/arch/arm/isa/bitfields.isa b/src/arch/arm/isa/bitfields.isa index bcb2869b7..e334f5521 100644 --- a/src/arch/arm/isa/bitfields.isa +++ b/src/arch/arm/isa/bitfields.isa @@ -70,8 +70,6 @@ def bitfield SHIFT_SIZE <11: 7>; def bitfield SHIFT < 6: 5>; def bitfield RM < 3: 0>; -def bitfield RE <20:16>; - def bitfield RS <11: 8>; def bitfield RDUP <19:16>; |