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author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-10-09 14:53:38 +0100 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-11-05 16:31:57 +0000 |
commit | 76b10e2b4abf36e441707e7e075ade75b11ab667 (patch) | |
tree | b54452fdeb47c20de2da79c283cb57f86421d946 /src/arch/arm/isa/bitfields.isa | |
parent | 75a127e8ba8885c7112fa92de5d81fa024981280 (diff) | |
download | gem5-76b10e2b4abf36e441707e7e075ade75b11ab667.tar.xz |
arch-arm: Annotate original address in CMOs
This is needed when a CMO triggers an exception (e.g. DataAbort) In that
case the faulting address should be the one encoded in the instruction
rather than the cacheline address:
According to armarm:
If a memory fault that sets FAR_EL1 is generated from a data cache
maintenance or other DC instruction, FAR_EL1[63:0] holds the address
specified in the register argument of the instruction.
Change-Id: I6d0dadbef6e70db57438b01a76c5def3bdd2d974
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22443
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/arm/isa/bitfields.isa')
0 files changed, 0 insertions, 0 deletions