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| author | Ali Saidi <saidi@eecs.umich.edu> | 2009-07-27 00:51:01 -0700 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2009-07-27 00:51:01 -0700 |
| commit | 99831ed93821ee8efc3e7a4b6671c5b226d245e2 (patch) | |
| tree | e9945e22340dc1c1c2f32d74720371dc4d078819 /src/arch/arm/isa/decoder.isa | |
| parent | 0a18bc0d6cdcbf68f9bf01ae98ce0f678c62f16f (diff) | |
| download | gem5-99831ed93821ee8efc3e7a4b6671c5b226d245e2.tar.xz | |
ARM: Handle register indexed system calls.
Diffstat (limited to 'src/arch/arm/isa/decoder.isa')
| -rw-r--r-- | src/arch/arm/isa/decoder.isa | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/arch/arm/isa/decoder.isa b/src/arch/arm/isa/decoder.isa index 76d584858..f43395c19 100644 --- a/src/arch/arm/isa/decoder.isa +++ b/src/arch/arm/isa/decoder.isa @@ -422,7 +422,10 @@ format DataOp { // ARM System Call (SoftWare Interrupt) 1: swi({{ if (testPredicate(Cpsr, condCode)) { - xc->syscall(IMMED_23_0); + if (IMMED_23_0) + xc->syscall(IMMED_23_0); + else + xc->syscall(R7); } }}); } |