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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:01 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:01 -0500 |
commit | 81fdced83f21db2fc1da1541365166fbd5918027 (patch) | |
tree | 977dffd524f89206f9607b8b9f82ede94e42db20 /src/arch/arm/isa/decoder/arm.isa | |
parent | 321d3a6e8c9ed9511f7944c8ad8dbd16508cb5ad (diff) | |
download | gem5-81fdced83f21db2fc1da1541365166fbd5918027.tar.xz |
ARM: Define the load instructions from outside the decoder.
Diffstat (limited to 'src/arch/arm/isa/decoder/arm.isa')
-rw-r--r-- | src/arch/arm/isa/decoder/arm.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa index 379fbbc64..e493f4455 100644 --- a/src/arch/arm/isa/decoder/arm.isa +++ b/src/arch/arm/isa/decoder/arm.isa @@ -255,9 +255,9 @@ format DataOp { }}); } } - 0x2: AddrMode2::addrMode2(Disp, disp); + 0x2: AddrMode2::addrMode2(True, Disp, disp); 0x3: decode OPCODE_4 { - 0: AddrMode2::addrMode2(Shift, Rm_Imm); + 0: AddrMode2::addrMode2(False, Shift, Rm_Imm); 1: decode MEDIA_OPCODE { 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7: WarnUnimpl::parallel_add_subtract_instructions(); 0x8: decode MISC_OPCODE { |