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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:05 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:05 -0500 |
commit | 34032f97d6861243a2338d02d6c7d071051c44c5 (patch) | |
tree | db48b07ce2a3ce05273db23c285e7aa34f4052ec /src/arch/arm/isa/decoder/arm.isa | |
parent | 52460938cbd156c7753deb18e3b2f7ded55335b0 (diff) | |
download | gem5-34032f97d6861243a2338d02d6c7d071051c44c5.tar.xz |
ARM: Trigger system calls from the SupervisorCall invoke method.
This simplifies the decoder slightly, and makes the system call mechanism
very slightly more realistic.
Diffstat (limited to 'src/arch/arm/isa/decoder/arm.isa')
-rw-r--r-- | src/arch/arm/isa/decoder/arm.isa | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa index 050571240..fe7e67b11 100644 --- a/src/arch/arm/isa/decoder/arm.isa +++ b/src/arch/arm/isa/decoder/arm.isa @@ -286,18 +286,13 @@ format DataOp { } // CPNUM (OP4 == 1) } //OPCODE_4 + 1: PredOp::swi({{ #if FULL_SYSTEM - 1: PredOp::swi({{ fault = new SupervisorCall; }}, IsSerializeAfter, IsNonSpeculative, IsSyscall); + fault = new SupervisorCall(); #else - 1: PredOp::swi({{ if (testPredicate(CondCodes, condCode)) - { - if (IMMED_23_0) - xc->syscall(IMMED_23_0); - else - xc->syscall(R7); - } - }}); -#endif // FULL_SYSTEM + fault = new SupervisorCall(machInst); +#endif + }}, IsSyscall); } // OPCODE_24 } |