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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-02-13 14:01:57 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-02-20 13:30:02 +0000 |
| commit | 73dcf05f633b5e3a7d9a16338a64c1832ef38388 (patch) | |
| tree | b66442229292c0b699e5ae7f6c1b236648c21a87 /src/arch/arm/isa/decoder/arm.isa | |
| parent | 26b03914d7dbcf6b6c8c0a9c08d4e3ff81365376 (diff) | |
| download | gem5-73dcf05f633b5e3a7d9a16338a64c1832ef38388.tar.xz | |
arch-arm: Add AArch32 HLT Semihosting interface
AArch32 HLT instruction is now able to issue Arm Semihosting commands as
the AArch64 counterpart in either Arm and Thumb mode.
Change-Id: I77da73d2e6a9288c704a5f646f4447022517ceb6
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/8372
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/isa/decoder/arm.isa')
| -rw-r--r-- | src/arch/arm/isa/decoder/arm.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa index 9b8b37a9c..1a32ce6b6 100644 --- a/src/arch/arm/isa/decoder/arm.isa +++ b/src/arch/arm/isa/decoder/arm.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2010-2013,2017 ARM Limited +// Copyright (c) 2010-2013,2017-2018 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -76,7 +76,7 @@ format DataOp { 0x5: ArmSatAddSub::armSatAddSub(); 0x6: ArmERet::armERet(); 0x7: decode OPCODE_22 { - 0: Breakpoint::bkpt(); + 0: ArmBkptHlt::armBkptHlt(); 1: ArmSmcHyp::armSmcHyp(); } } |