summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/decoder/arm.isa
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:08 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:08 -0500
commit504ac6518bea90d614c2d2394fa3881f8557d798 (patch)
treea7feb3b7b589dfe5819b557013ca1b58d490236a /src/arch/arm/isa/decoder/arm.isa
parent2c94bf7f30d3e9febe30485cf7182b650f48f4d5 (diff)
downloadgem5-504ac6518bea90d614c2d2394fa3881f8557d798.tar.xz
ARM: Decode the clz instruction.
Diffstat (limited to 'src/arch/arm/isa/decoder/arm.isa')
-rw-r--r--src/arch/arm/isa/decoder/arm.isa7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa
index fe8e1ed2e..ca74a2c1e 100644
--- a/src/arch/arm/isa/decoder/arm.isa
+++ b/src/arch/arm/isa/decoder/arm.isa
@@ -67,12 +67,7 @@ format DataOp {
1: decode OPCODE_7 {
0x0: decode MISC_OPCODE {
0x0: ArmMsrMrs::armMsrMrs();
- 0x1: decode OPCODE {
- 0x9: ArmBx::armBx();
- 0xb: PredOp::clz({{
- Rd = ((Rm == 0) ? 32 : (31 - findMsbSet(Rm)));
- }});
- }
+ 0x1: ArmBxClz::armBxClz();
0x2: decode OPCODE {
0x9: WarnUnimpl::bxj();
}