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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:07 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:07 -0500 |
| commit | 952253483b85bee25f8ef23cc147fade2bf0c00f (patch) | |
| tree | 7b23d11210a8e379022933f5b15eb16e1f30e37f /src/arch/arm/isa/decoder/thumb.isa | |
| parent | f7f75ad053b492897ffc76808541dc40f2239aed (diff) | |
| download | gem5-952253483b85bee25f8ef23cc147fade2bf0c00f.tar.xz | |
ARM: Rearrange the load/store double/exclusive, table branch thumb decoding.
Diffstat (limited to 'src/arch/arm/isa/decoder/thumb.isa')
| -rw-r--r-- | src/arch/arm/isa/decoder/thumb.isa | 50 |
1 files changed, 8 insertions, 42 deletions
diff --git a/src/arch/arm/isa/decoder/thumb.isa b/src/arch/arm/isa/decoder/thumb.isa index b76599232..da8248683 100644 --- a/src/arch/arm/isa/decoder/thumb.isa +++ b/src/arch/arm/isa/decoder/thumb.isa @@ -68,50 +68,16 @@ // 32 bit thumb instructions. 1: decode HTOPCODE_12_11 { 0x1: decode HTOPCODE_10_9 { - 0x0: decode HTOPCODE_8_6 { - 0x0, 0x6: decode HTOPCODE_4 { - 0x0: WarnUnimpl::srs(); - 0x1: WarnUnimpl::rfe(); - } - 0x1: decode HTOPCODE_5_4 { - 0x0: WarnUnimpl::strex(); - 0x1: WarnUnimpl::ldrex(); - 0x2: WarnUnimpl::strd(); // immediate - 0x3: decode HTRN { - 0xf: WarnUnimpl::ldrd(); // literal - default: WarnUnimpl::ldrd(); // immediate - } - } - // This uses the same encoding as regular ARM. - 0x2: ArmMacroMem::armMacroMem(); - 0x3: decode HTOPCODE_5_4 { - 0x0: decode LTOPCODE_7_4 { - 0x4: WarnUnimpl::strexb(); - 0x5: WarnUnimpl::strexh(); - 0x7: WarnUnimpl::strexd(); - } - 0x1: decode LTOPCODE_7_4 { - 0x0: WarnUnimpl::tbb(); - 0x1: WarnUnimpl::tbh(); - 0x4: WarnUnimpl::ldrexb(); - 0x5: WarnUnimpl::ldrexh(); - 0x7: WarnUnimpl::ldrexd(); - } - 0x2: WarnUnimpl::strd(); // immediate - 0x3: decode HTRN { - 0xf: WarnUnimpl::ldrd(); // literal - default: WarnUnimpl::ldrd(); // immediate - } - } - // This uses the same encoding as regular ARM. - 0x4: ArmMacroMem::armMacroMem(); - 0x5, 0x7: decode HTOPCODE_4 { - 0x0: WarnUnimpl::strd(); // immediate - 0x1: decode HTRN { - 0xf: WarnUnimpl::ldrd(); // literal - default: WarnUnimpl::ldrd(); // immediate + 0x0: decode HTOPCODE_6 { + 0x0: decode HTOPCODE_8_7 { + 0x0, 0x3: decode HTOPCODE_4 { + 0x0: WarnUnimpl::srs(); + 0x1: WarnUnimpl::rfe(); } + // This uses the same encoding as regular ARM. + default: ArmMacroMem::armMacroMem(); } + 0x1: Thumb32LdrStrDExTbh::thumb32LdrStrDExTbh(); } 0x1: Thumb32DataProcShiftReg::thumb32DataProcShiftReg(); default: decode HTOPCODE_9_8 { |