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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:11 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:11 -0500 |
commit | 0ff71c7c343f2cb2ef4cb89168267795fda6ff15 (patch) | |
tree | 0003a415bffe679bea060eb7d300393f9b730388 /src/arch/arm/isa/decoder/thumb.isa | |
parent | c9c4dfc09dacd9dfc29655e78f7caa1fcc6dfce6 (diff) | |
download | gem5-0ff71c7c343f2cb2ef4cb89168267795fda6ff15.tar.xz |
ARM: Decode 8, 16, and 32 bit transfers between core and extension (fp) registers.
Diffstat (limited to 'src/arch/arm/isa/decoder/thumb.isa')
-rw-r--r-- | src/arch/arm/isa/decoder/thumb.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/isa/decoder/thumb.isa b/src/arch/arm/isa/decoder/thumb.isa index 23c33df48..9c64fd37a 100644 --- a/src/arch/arm/isa/decoder/thumb.isa +++ b/src/arch/arm/isa/decoder/thumb.isa @@ -86,7 +86,7 @@ default: WarnUnimpl::cdp(); // cdp2 } 0x1: decode LTCOPROC { - 0xa, 0xb: WarnUnimpl::Core_to_extension_transfer(); + 0xa, 0xb: ShortFpTransfer::shortFpTransfer(); default: decode CPNUM { 15: McrMrc15::mcrMrc15(); default: decode HTOPCODE_4 { |