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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:01 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:01 -0500
commit4bbd73649d55fa59cf404cbd72bd68478d1115ff (patch)
treed0c309f1bd3b89b54326e458a1a7b3aea4046e83 /src/arch/arm/isa/decoder
parent462cf6f49b388558d1fe7aa7731500d0e9abcdef (diff)
downloadgem5-4bbd73649d55fa59cf404cbd72bd68478d1115ff.tar.xz
ARM: Decode 16 bit thumb register addressed memory instructions.
Diffstat (limited to 'src/arch/arm/isa/decoder')
-rw-r--r--src/arch/arm/isa/decoder/thumb.isa11
1 files changed, 1 insertions, 10 deletions
diff --git a/src/arch/arm/isa/decoder/thumb.isa b/src/arch/arm/isa/decoder/thumb.isa
index 1518b04ea..aec9ebdfc 100644
--- a/src/arch/arm/isa/decoder/thumb.isa
+++ b/src/arch/arm/isa/decoder/thumb.isa
@@ -90,16 +90,7 @@
0xe, 0xf: WarnUnimpl::blx(); //register
}
0x2, 0x3: WarnUnimpl::ldr();
- default: decode TOPCODE_11_9 {
- 0x0: WarnUnimpl::str(); //register
- 0x1: WarnUnimpl::strh(); //register
- 0x2: WarnUnimpl::strb(); //register
- 0x3: WarnUnimpl::ldrsb(); //register
- 0x4: WarnUnimpl::ldr(); //register
- 0x5: WarnUnimpl::ldrh(); //register
- 0x6: WarnUnimpl::ldrb(); //register
- 0x7: WarnUnimpl::ldrsh(); //register
- }
+ default: Thumb16MemReg::thumb16MemReg();
}
0x3: decode TOPCODE_12_11 {
0x0: WarnUnimpl::str(); //immediate, thumb