summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/formats/branch.isa
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2009-06-21 17:21:25 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-06-21 17:21:25 -0700
commitd4a03f19009b9a537d99d54620784d441f9c3a92 (patch)
tree865d044e0a86840ce9e9837f0eaac6e9da1a1bed /src/arch/arm/isa/formats/branch.isa
parent2a39570b78dd5871582089e7e1b21b739d2e9d68 (diff)
downloadgem5-d4a03f19009b9a537d99d54620784d441f9c3a92.tar.xz
ARM: Simplify the ISA desc by pulling some classes out of it.
Diffstat (limited to 'src/arch/arm/isa/formats/branch.isa')
-rw-r--r--src/arch/arm/isa/formats/branch.isa184
1 files changed, 0 insertions, 184 deletions
diff --git a/src/arch/arm/isa/formats/branch.isa b/src/arch/arm/isa/formats/branch.isa
index 3e69c9532..b8fbb982d 100644
--- a/src/arch/arm/isa/formats/branch.isa
+++ b/src/arch/arm/isa/formats/branch.isa
@@ -33,190 +33,6 @@
// Control transfer instructions
//
-output header {{
-
-#include <iostream>
-
- /**
- * Base class for instructions whose disassembly is not purely a
- * function of the machine instruction (i.e., it depends on the
- * PC). This class overrides the disassemble() method to check
- * the PC and symbol table values before re-using a cached
- * disassembly string. This is necessary for branches and jumps,
- * where the disassembly string includes the target address (which
- * may depend on the PC and/or symbol table).
- */
- class PCDependentDisassembly : public PredOp
- {
- protected:
- /// Cached program counter from last disassembly
- mutable Addr cachedPC;
-
- /// Cached symbol table pointer from last disassembly
- mutable const SymbolTable *cachedSymtab;
-
- /// Constructor
- PCDependentDisassembly(const char *mnem, MachInst _machInst,
- OpClass __opClass)
- : PredOp(mnem, _machInst, __opClass),
- cachedPC(0), cachedSymtab(0)
- {
- }
-
- const std::string &
- disassemble(Addr pc, const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for branches (PC-relative control transfers),
- * conditional or unconditional.
- */
- class Branch : public PCDependentDisassembly
- {
- protected:
- /// target address (signed) Displacement .
- int32_t disp;
-
- /// Constructor.
- Branch(const char *mnem, MachInst _machInst, OpClass __opClass)
- : PCDependentDisassembly(mnem, _machInst, __opClass),
- disp(OFFSET << 2)
- {
- //If Bit 26 is 1 then Sign Extend
- if ( (disp & 0x02000000) > 0 ) {
- disp |= 0xFC000000;
- }
- }
-
- Addr branchTarget(Addr branchPC) const;
-
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- };
-
- /**
- * Base class for branch and exchange instructions on the ARM
- */
- class BranchExchange : public PredOp
- {
- protected:
- /// Constructor
- BranchExchange(const char *mnem, MachInst _machInst,
- OpClass __opClass)
- : PredOp(mnem, _machInst, __opClass)
- {
- }
-
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- };
-
-
- /**
- * Base class for jumps (register-indirect control transfers). In
- * the Arm ISA, these are always unconditional.
- */
- class Jump : public PCDependentDisassembly
- {
- protected:
-
- /// Displacement to target address (signed).
- int32_t disp;
-
- uint32_t target;
-
- public:
- /// Constructor
- Jump(const char *mnem, MachInst _machInst, OpClass __opClass)
- : PCDependentDisassembly(mnem, _machInst, __opClass),
- disp(OFFSET << 2)
- {
- }
-
- Addr branchTarget(ThreadContext *tc) const;
-
- std::string
- generateDisassembly(Addr pc, const SymbolTable *symtab) const;
- };
-}};
-
-output decoder {{
- Addr
- Branch::branchTarget(Addr branchPC) const
- {
- return branchPC + 8 + disp;
- }
-
- Addr
- Jump::branchTarget(ThreadContext *tc) const
- {
- Addr NPC = tc->readPC() + 8;
- uint64_t Rb = tc->readIntReg(_srcRegIdx[0]);
- return (Rb & ~3) | (NPC & 1);
- }
-
- const std::string &
- PCDependentDisassembly::disassemble(Addr pc,
- const SymbolTable *symtab) const
- {
- if (!cachedDisassembly ||
- pc != cachedPC || symtab != cachedSymtab)
- {
- if (cachedDisassembly)
- delete cachedDisassembly;
-
- cachedDisassembly =
- new std::string(generateDisassembly(pc, symtab));
- cachedPC = pc;
- cachedSymtab = symtab;
- }
-
- return *cachedDisassembly;
- }
-
- std::string
- Branch::generateDisassembly(Addr pc, const SymbolTable *symtab) const
- {
- std::stringstream ss;
-
- ccprintf(ss, "%-10s ", mnemonic);
-
- Addr target = pc + 8 + disp;
-
- std::string str;
- if (symtab && symtab->findSymbol(target, str))
- ss << str;
- else
- ccprintf(ss, "0x%x", target);
-
- return ss.str();
- }
-
- std::string
- BranchExchange::generateDisassembly(Addr pc, const SymbolTable *symtab) const
- {
- std::stringstream ss;
-
- ccprintf(ss, "%-10s ", mnemonic);
-
- if (_numSrcRegs > 0) {
- printReg(ss, _srcRegIdx[0]);
- }
-
- return ss.str();
- }
-
- std::string
- Jump::generateDisassembly(Addr pc, const SymbolTable *symtab) const
- {
- std::stringstream ss;
-
- ccprintf(ss, "%-10s ", mnemonic);
-
- return ss.str();
- }
-}};
-
def format Branch(code,*opt_flags) {{
#Build Instruction Flags