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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:07 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:07 -0500
commitf581fd3f899648f8699f53ecdc913e7d50c26f8f (patch)
tree5b4cf4eee2a72fb73925c976a56789f71cd16db6 /src/arch/arm/isa/formats/data.isa
parent9ffc5e2ae64017cec061b112f4dc5e5846f44ed7 (diff)
downloadgem5-f581fd3f899648f8699f53ecdc913e7d50c26f8f.tar.xz
ARM: Decode pkh instructions.
Diffstat (limited to 'src/arch/arm/isa/formats/data.isa')
-rw-r--r--src/arch/arm/isa/formats/data.isa14
1 files changed, 12 insertions, 2 deletions
diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index c1057caeb..d313f0f01 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -140,7 +140,13 @@ def format ArmPackUnpackSatReverse() {{
const ArmShiftType type =
(ArmShiftType)(uint32_t)bits(machInst, 6, 5);
if (op1 == 0) {
- return new WarnUnimplemented("pkh", machInst);
+ if (type) {
+ return new PkhtbReg(machInst, rd, (IntRegIndex)a,
+ rn, imm, type);
+ } else {
+ return new PkhbtReg(machInst, rd, (IntRegIndex)a,
+ rn, imm, type);
+ }
} else if (bits(op1, 2, 1) == 1) {
return new Ssat(machInst, rd, satImm + 1, rn, imm, type);
} else if (bits(op1, 2, 1) == 3) {
@@ -1284,7 +1290,11 @@ def format Thumb32DataProcShiftReg() {{
%(eor)s
}
case 0x6:
- return new WarnUnimplemented("pkh", machInst);
+ if (type) {
+ return new PkhtbReg(machInst, rd, rn, rm, amt, type);
+ } else {
+ return new PkhbtReg(machInst, rd, rn, rm, amt, type);
+ }
case 0x8:
if (rd == INTREG_PC) {
%(cmn)s