ARM: BX instruction can be contitional if last instruction in a IT block

Branches are allowed to be the last instuction in an IT block. Before it was
assumed that they could not. So Branches in thumb2 were Uncond.

1 files changed, 14 insertions, 2 deletions

diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index a2e748bcb..03a585001 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -1040,13 +1040,25 @@ def format Thumb16SpecDataAndBx() {{
             return new MovReg(machInst, rdn, INTREG_ZERO, rm, 0, LSL);
           case 0x3:
             if (bits(machInst, 7) == 0) {
+                ConditionCode condCode;
+                if(machInst.itstateMask) {
+                  condCode = (ConditionCode)(uint8_t)machInst.itstateCond;
+                } else {
+                  condCode = COND_UC;
+                }
                 return new BxReg(machInst,
                                  (IntRegIndex)(uint32_t)bits(machInst, 6, 3),
-                                 COND_UC);
+                                 condCode);
             } else {
+                ConditionCode condCode;
+                if(machInst.itstateMask) {
+                  condCode = (ConditionCode)(uint8_t)machInst.itstateCond;
+                } else {
+                  condCode = COND_UC;
+                }
                 return new BlxReg(machInst,
                                   (IntRegIndex)(uint32_t)bits(machInst, 6, 3),
-                                  COND_UC);
+                                  condCode);
             }
         }
     }