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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:13 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:13 -0500
commit81b7c3d264c4caa366bd16aa644e72cad905e981 (patch)
tree2edd428e4710f44be0b7b25e9b836760a8717e72 /src/arch/arm/isa/formats/fp.isa
parente21f93702ab8d03a8eddffc1a7b33f51af82e8c2 (diff)
downloadgem5-81b7c3d264c4caa366bd16aa644e72cad905e981.tar.xz
ARM: Move the FP decode blocks into functions.
Diffstat (limited to 'src/arch/arm/isa/formats/fp.isa')
-rw-r--r--src/arch/arm/isa/formats/fp.isa30
1 files changed, 27 insertions, 3 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa
index 77d6d8e9e..560a16edf 100644
--- a/src/arch/arm/isa/formats/fp.isa
+++ b/src/arch/arm/isa/formats/fp.isa
@@ -148,8 +148,14 @@ def format FloatCmp(fReg1, fReg2, *flags) {{
exec_output = FPAExecute.subst(iop)
}};
-def format ExtensionRegLoadStore() {{
- decode_block = '''
+let {{
+ header_output = '''
+ StaticInstPtr
+ decodeExtensionRegLoadStore(ExtMachInst machInst);
+ '''
+ decoder_output = '''
+ StaticInstPtr
+ decodeExtensionRegLoadStore(ExtMachInst machInst)
{
const uint32_t opcode = bits(machInst, 24, 20);
const uint32_t offset = bits(machInst, 7, 0);
@@ -277,8 +283,20 @@ def format ExtensionRegLoadStore() {{
}
}};
-def format ShortFpTransfer() {{
+def format ExtensionRegLoadStore() {{
decode_block = '''
+ return decodeExtensionRegLoadStore(machInst);
+ '''
+}};
+
+let {{
+ header_output = '''
+ StaticInstPtr
+ decodeShortFpTransfer(ExtMachInst machInst);
+ '''
+ decoder_output = '''
+ StaticInstPtr
+ decodeShortFpTransfer(ExtMachInst machInst)
{
const uint32_t l = bits(machInst, 20);
const uint32_t c = bits(machInst, 8);
@@ -443,3 +461,9 @@ def format ShortFpTransfer() {{
}
'''
}};
+
+def format ShortFpTransfer() {{
+ decode_block = '''
+ return decodeShortFpTransfer(machInst);
+ '''
+}};