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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:15 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:15 -0500 |
| commit | 1b3b75ee681b1fe83ccf1240bf5d1afa174c6421 (patch) | |
| tree | abe49217ba3ff36794ffbb3d245dfd1b3c433c39 /src/arch/arm/isa/formats/fp.isa | |
| parent | aa05e5401c37c7e60f28e13f8e6de5c5f74e904d (diff) | |
| download | gem5-1b3b75ee681b1fe83ccf1240bf5d1afa174c6421.tar.xz | |
ARM: Implement the version of VCVT float to int that rounds towards zero.
Diffstat (limited to 'src/arch/arm/isa/formats/fp.isa')
| -rw-r--r-- | src/arch/arm/isa/formats/fp.isa | 40 |
1 files changed, 30 insertions, 10 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa index 3d40caf9e..2b999f751 100644 --- a/src/arch/arm/isa/formats/fp.isa +++ b/src/arch/arm/isa/formats/fp.isa @@ -725,20 +725,40 @@ let {{ } } case 0xc: - if (single) { - return new VcvtFpUIntS(machInst, vd, vm); + if (bits(machInst, 7) == 0) { + if (single) { + return new VcvtFpUIntSR(machInst, vd, vm); + } else { + vd = (IntRegIndex)(bits(machInst, 22) | + (bits(machInst, 15, 12) << 1)); + return new VcvtFpUIntDR(machInst, vd, vm); + } } else { - vd = (IntRegIndex)(bits(machInst, 22) | - (bits(machInst, 15, 12) << 1)); - return new VcvtFpUIntD(machInst, vd, vm); + if (single) { + return new VcvtFpUIntS(machInst, vd, vm); + } else { + vd = (IntRegIndex)(bits(machInst, 22) | + (bits(machInst, 15, 12) << 1)); + return new VcvtFpUIntD(machInst, vd, vm); + } } case 0xd: - if (single) { - return new VcvtFpSIntS(machInst, vd, vm); + if (bits(machInst, 7) == 0) { + if (single) { + return new VcvtFpSIntSR(machInst, vd, vm); + } else { + vd = (IntRegIndex)(bits(machInst, 22) | + (bits(machInst, 15, 12) << 1)); + return new VcvtFpSIntDR(machInst, vd, vm); + } } else { - vd = (IntRegIndex)(bits(machInst, 22) | - (bits(machInst, 15, 12) << 1)); - return new VcvtFpSIntD(machInst, vd, vm); + if (single) { + return new VcvtFpSIntS(machInst, vd, vm); + } else { + vd = (IntRegIndex)(bits(machInst, 22) | + (bits(machInst, 15, 12) << 1)); + return new VcvtFpSIntD(machInst, vd, vm); + } } case 0xe: { |