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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:14 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:14 -0500
commit65f5204325f22ae8cc2b42da5ef046c55acf2a9d (patch)
treeae905af99b3b391771e5142f641061746f9e4d2a /src/arch/arm/isa/formats/fp.isa
parent19e05d7e8d4a5e9a6f3bb60d3530e2de6a61fee0 (diff)
downloadgem5-65f5204325f22ae8cc2b42da5ef046c55acf2a9d.tar.xz
ARM: Implement the VFP version of vmul.
Diffstat (limited to 'src/arch/arm/isa/formats/fp.isa')
-rw-r--r--src/arch/arm/isa/formats/fp.isa20
1 files changed, 19 insertions, 1 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa
index 848ce907c..2222b1e62 100644
--- a/src/arch/arm/isa/formats/fp.isa
+++ b/src/arch/arm/isa/formats/fp.isa
@@ -486,7 +486,25 @@ let {{
return new WarnUnimplemented("vmla, vmls", machInst);
case 0x2:
if ((opc3 & 0x1) == 0) {
- return new WarnUnimplemented("vmul", machInst);
+ uint32_t vd;
+ uint32_t vm;
+ uint32_t vn;
+ if (bits(machInst, 8) == 0) {
+ vd = bits(machInst, 22) | (bits(machInst, 15, 12) << 1);
+ vm = bits(machInst, 5) | (bits(machInst, 3, 0) << 1);
+ vn = bits(machInst, 7) | (bits(machInst, 19, 16) << 1);
+ return new VmulS(machInst, (IntRegIndex)vd,
+ (IntRegIndex)vn, (IntRegIndex)vm);
+ } else {
+ vd = (bits(machInst, 22) << 5) |
+ (bits(machInst, 15, 12) << 1);
+ vm = (bits(machInst, 5) << 5) |
+ (bits(machInst, 3, 0) << 1);
+ vn = (bits(machInst, 7) << 5) |
+ (bits(machInst, 19, 16) << 1);
+ return new VmulD(machInst, (IntRegIndex)vd,
+ (IntRegIndex)vn, (IntRegIndex)vm);
+ }
}
case 0x1:
return new WarnUnimplemented("vnmla, vnmls, vnmul", machInst);