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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-06-21 09:21:07 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-06-21 09:21:07 -0700 |
| commit | 71e0d1ded278a85e33a628ddc842c975a216854f (patch) | |
| tree | 38b6d745885794a55021ab2f80f565dd4ed89fa8 /src/arch/arm/isa/formats/fp.isa | |
| parent | 19a1966079442ccbcda70c33bbcead7abb609985 (diff) | |
| download | gem5-71e0d1ded278a85e33a628ddc842c975a216854f.tar.xz | |
ARM: Pull some static code out of the isa desc and create miscregs.hh.
Diffstat (limited to 'src/arch/arm/isa/formats/fp.isa')
| -rw-r--r-- | src/arch/arm/isa/formats/fp.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa index 682c76079..1dd05c223 100644 --- a/src/arch/arm/isa/formats/fp.isa +++ b/src/arch/arm/isa/formats/fp.isa @@ -67,7 +67,7 @@ def template FPAExecute {{ %(code)s; - if (arm_predicate(xc->readMiscReg(ArmISA::CPSR), condCode) && + if (testPredicate(xc->readMiscReg(ArmISA::MISCREG_CPSR), condCode) && fault == NoFault) { %(op_wb)s; |